The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 22, 2012
Filed:
Aug. 11, 2009
Yuyu Chang, Irvine, CA (US);
Qiang LI, Irvine, CA (US);
John Leete, Huntington Beach, CA (US);
Hooman Darabi, Irvine, CA (US);
Yiannis Kokolakis, Holargos, GR;
Yuyu Chang, Irvine, CA (US);
Qiang Li, Irvine, CA (US);
John Leete, Huntington Beach, CA (US);
Hooman Darabi, Irvine, CA (US);
Yiannis Kokolakis, Holargos, GR;
Broadcom Corporation, Irvine, CA (US);
Abstract
A method to provide a low-power clock signal or a low-noise clock signal is described herein. It is determined whether a low-power mode or a low-noise mode is in use. A voltage reference input of a low-dropout voltage regulator (LDO) is switched to a low-power voltage reference for low-power mode and to a low-noise voltage reference for low-noise mode. The LDO provides a constant voltage output to a crystal oscillator. A clock signal is generated using the crystal oscillator. The clock signal is limited using a low-power limiter to generate a low-power output clock signal and/or is limited using a low-noise limiter to generate a low-noise clock signal. The low-power output clock signal or the low-noise output clock signal is selected using a mux.