The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 22, 2012

Filed:

Nov. 14, 2008
Applicants:

Seok-won Kim, Paju-si, KR;

Won-joon Ho, Cheongju-si, KR;

Hyuk-jin Kwon, Seongnam-si, KR;

Chang-mo Yoo, Bucheon-si, KR;

Inventors:

Seok-Won Kim, Paju-si, KR;

Won-Joon Ho, Cheongju-si, KR;

Hyuk-Jin Kwon, Seongnam-si, KR;

Chang-Mo Yoo, Bucheon-si, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 33/00 (2010.01);
U.S. Cl.
CPC ...
Abstract

A method of fabricating an array substrate for a liquid crystal display device includes: forming an initial photoresist (PR) pattern on a metallic material layer; etching the metallic material layer using the initial PR pattern as an etching mask to form the data line and a metallic material pattern, wherein the initial PR pattern is disposed on the data line; performing a first ashing process onto the initial PR pattern to partially remove the initial PR pattern so as to form a first ashed PR pattern, the first ashed PR pattern having a smaller width and a smaller thickness than the initial PR pattern such that end portions of the data line are exposed by the first ashed PR pattern; etching the intrinsic amorphous silicon layer and the impurity-doped amorphous silicon layer by a first dry-etching process; forming a source electrode and a drain electrode on the substrate.


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