The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 15, 2012

Filed:

Jul. 21, 2009
Applicants:

Viet Linh DO, Carlsbad, CA (US);

Wei Fu, San Diego, CA (US);

Inventors:

Viet Linh Do, Carlsbad, CA (US);

Wei Fu, San Diego, CA (US);

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04L 7/00 (2006.01); H04L 25/00 (2006.01); H04L 25/40 (2006.01);
U.S. Cl.
CPC ...
Abstract

An inter-symbol interference (ISI) pattern-weighted early-late phase detector is provided. I and Q clocks are generated, where the Q clock has a fixed phase delay with respect to the I clock. The I clock frequency is divided by n, creating a reference clock. A serial data stream is sequentially sampled with the I and Q clocks, creating digital I-bit and Q-bit values, respectively. The I-bit values and Q-bit values are segmented into n-bit digital words. In response to analyzing the I-bit and Q-bit values, I clock phase corrections are identified. Also identified are bit sequence patterns associated with each I-bit value. Each I-bit value is weighted in response to the identified bit sequence pattern and the identified I clock phase correction. A phase error signal is generated by averaging the weighted I-bit values for each n-bit digital word, and I clock is modified in phase.


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