The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 15, 2012
Filed:
Oct. 16, 2009
Takeshi Takagi, Kyoto, JP;
Shunsaku Muraoka, Osaka, JP;
Mitsuteru Iijima, Osaka, JP;
Ken Kawai, Osaka, JP;
Kazuhiko Shimakawa, Osaka, JP;
Takeshi Takagi, Kyoto, JP;
Shunsaku Muraoka, Osaka, JP;
Mitsuteru Iijima, Osaka, JP;
Ken Kawai, Osaka, JP;
Kazuhiko Shimakawa, Osaka, JP;
Panasonic Corporation, Osaka, JP;
Abstract
Provided is a nonvolatile storage device () capable of stably operating without increasing a size of a selection transistor included in each of memory cells. The nonvolatile storage device () includes: a semiconductor substrate () which has a P-type well () of a first conductivity type; a memory cell array () which includes memory cells (M) or the like each of which includes a variable resistance element (R) and a transistor (N) that are formed above the semiconductor substrate () and connected in series; and a substrate bias circuit () which applies, to the P-type well (), a bias voltage in a forward direction with respect to a source and a drain of the transistor (N), when a voltage pulse for writing is applied to the variable resistance element (R) included in the selected memory cell (M) or the like.