The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 15, 2012
Filed:
Apr. 02, 2008
Kazuki Hayata, Soraku-gun, JP;
Kazumi Nakazuru, Soraku-gun, JP;
Kazuki Hayata, Soraku-gun, JP;
Kazumi Nakazuru, Soraku-gun, JP;
Kyocera Corporation, Kyoto, JP;
Abstract
The invention relates to a direct-current blocking circuit, and a hybrid circuit device, a transmitter, a receiver, a transmitter-receiver and a radar device that have the direct-current blocking circuit. A dielectric substrate () is provided with a conductor layer () disposed parallel with the dielectric substrate (), first and second planar lines () each containing a part of the conductor layer (), and a waveguide () containing a part of the conductor layer (). The first and second planar lines () are located on one surface () side of the dielectric substrate () with respect to the conductor layer (), and the waveguide () is located on another surface () side of the dielectric substrate (). In a transmission direction (X) of electric signals, as to the waveguide (), its one end overlaps with one end of the first planar line (), and its another end overlaps with one end of the second planar line (). In the overlapped regions, first and second through-holes () are so formed as to penetrate the conductor layer () in its thickness direction.