The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 15, 2012
Filed:
Nov. 02, 2009
Peter Seitz, Urdrof, CH;
Peter Seitz, Urdrof, CH;
CSEM Centre Suisse d'Electronique et de Microtechnique SA, Neuchatal, CH;
Abstract
The invention relates to the sampling of temporally changing amounts of charge () by receiving varying amounts of charge () varying as a function of time, transforming the varying amounts of charge received into a linear distribution pattern, sampling the linear distribution pattern at a plurality of discretely spaced sampling locations (), and collecting the amounts of charge () located between two adjacent scanning locations, and further detecting the collected amounts of charges (). A temporal sampling device for time-varying analog signals encompasses a transducer () in which the analog signals are converted into a corresponding electrical current, a time conversion element () in which the electronic charge packets () composing the current signal are transported in an electric field along a one-dimensional path, a fast charge-storing and accumulation mechanism with which the charge packets () on the one-dimensional path of the time conversion element () can all be stored simultaneously, so that their spatial relationship is retained, and a charge detection circuit () with which the stored charge packets () can be accessed individually and read out with an electronic circuit. In a preferred embodiment, all elements of the sampling device are monolithically integrated using a semiconductor process such as a commercially available CMOS process based on silicon. This makes it possible to provide one- and two-dimensional arrays of such sampling devices, forming line and image sensors.