The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 08, 2012
Filed:
Dec. 22, 2009
Tsuyoshi Takahashi, Tsukuba, JP;
Yutaka Hayashi, Tsukuba, JP;
Yuichiro Masuda, Tsukuba, JP;
Shigeo Furuta, Tsukuba, JP;
Masatoshi Ono, Tsukuba, JP;
Tsuyoshi Takahashi, Tsukuba, JP;
Yutaka Hayashi, Tsukuba, JP;
Yuichiro Masuda, Tsukuba, JP;
Shigeo Furuta, Tsukuba, JP;
Masatoshi Ono, Tsukuba, JP;
Funai Electric Advanced Applied Technology Research Institute Inc., Daito-shi, JP;
Funai Electric Co., Ltd., Daito-shi, JP;
Abstract
Disclosed is a memory cell array including word and first bit lines and second bit lines respectively connected to memory cells, wherein each memory cell includes a MOS transistor and switching element having first and second conductive layers and a gap in which a resistance value changes by applying a predetermined voltage, and data is written by specifying the first bit line to connect it to a ground, specifying the word line and supplying a write voltage to the second bit lines, and read by specifying the word line, and specifying the first bit line to supply a read voltage lower than the write voltage to the second bit lines, and the word line is specified when the voltage of the word line becomes a gate threshold value voltage or more and a sum of a drive voltage and the gate threshold value voltage or less.