The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 08, 2012

Filed:

Aug. 05, 2008
Applicants:

Florin Udrea, Cambridge, GB;

Vasantha Pathirana, Cambridge, GB;

Tanya Trajkovic, Cambridge, GB;

Nishad Udugampola, Cambridge, GB;

Inventors:

Florin Udrea, Cambridge, GB;

Vasantha Pathirana, Cambridge, GB;

Tanya Trajkovic, Cambridge, GB;

Nishad Udugampola, Cambridge, GB;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/94 (2006.01);
U.S. Cl.
CPC ...
Abstract

A power semiconductor device has a top surface and an opposed bottom surface below a part of which is a thick portion of semiconductor substrate. At least a portion of a drift region of the device has either no or only a thin portion of semiconductor substrate positioned thereunder. The top surface has a high voltage terminal and a low voltage terminal connected thereto to allow a voltage to be applied laterally across the drift region. At least two MOS (metal-oxide-semiconductor) gates are provided on the top surface. The device has at least one relatively highly doped region at its top surface extending between and in contact with said first and second MOS gates. The device has improved protection against triggering of parasitic transistors or latch-up without the on-state voltage drop or switching speed being compromised.


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