The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 01, 2012

Filed:

Mar. 10, 2009
Applicants:

Chih-ting Yeh, Hsinchu County, TW;

Yung-chih Liang, Taipei County, TW;

Shih-hung Chen, Taipei County, TW;

Inventors:

Chih-Ting Yeh, Hsinchu County, TW;

Yung-Chih Liang, Taipei County, TW;

Shih-Hung Chen, Taipei County, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H02H 9/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

An ESD clamp circuit applied to a power amplifier is provided. The ESD clamp circuit includes a first line, a second line, a first circuit, a second circuit, an ESD detecting unit, a buffer unit, and an ESD clamp unit. The first line is coupled to the output terminal of the power amplifier. The first circuit is coupled to the first line. The second circuit is coupled to the first circuit. The ESD detecting unit is coupled to the first circuit and the second line. The buffer unit is coupled to the second circuit, the second line and the ESD detecting unit. The ESD clamp unit is coupled to the buffer unit, the first line and the second line. Therefore, at normal operation mode, the problem of signal loss caused by the leakage current of ESD clamp circuit can be avoided.


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