The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 01, 2012
Filed:
Oct. 16, 2007
Thomas Poonnen, Cortland, NY (US);
Jeffrey J. Zarnowski, McGraw, NY (US);
LI Liu, Cortland, NY (US);
Michael Joyner, McGraw, NY (US);
Ketan V. Karia, Cortland, NY (US);
Thomas Poonnen, Cortland, NY (US);
Jeffrey J. Zarnowski, McGraw, NY (US);
Li Liu, Cortland, NY (US);
Michael Joyner, McGraw, NY (US);
Ketan V. Karia, Cortland, NY (US);
Panavision Imaging LLC, Homer, NY (US);
Abstract
A solid state imager converts analog pixel values to digital form on an arrayed per-column basis. An N-bit counter supplies an N-bit DAC to produce an analog ramp output with a level that varies corresponding to the contents of the counter. A latch/counter or equivalent is associated with each respective column. A clock supplies clock signal(s) to the counter elements. When the analog ramp equals the pixel value for that column, the latch/counter latches the value. The black level can be pre-set in the latch/counter or can be subtracted separately to reduce fixed pattern noise. The pixels can be oversampled for some number of times, e.g., n=16, to reduce the thermal noise of the sensors. Also, two or more pixels sharing a common sense node may be binned together, and two (or more) pixels having different integration times may be combined to obtain an output signal with enhanced dynamic range.