The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 24, 2012
Filed:
Dec. 19, 2008
Charles Leroy Sobchak, Davie, FL (US);
Mahibur Rahman, Chandler, AZ (US);
Charles LeRoy Sobchak, Davie, FL (US);
Mahibur Rahman, Chandler, AZ (US);
Freescale Semiconductor, Inc., Austin, TX (US);
Abstract
A discrete time signal resampling circuit (). A data sample processing module () removes selected samples from a sequential plurality of discrete time signal samples to implement fractional resampling where the data sample processing module stores fewer samples than the number of samples between samples to be removed. A coefficient generator () in the resampling circuit generates a sequence of finite impulse response filter coefficients, with each coefficient in the sequence being associated with a respective distinct portion of a plurality of discrete time signal samples. A coefficient multiplier () multiplies each of the sequential plurality of finite impulse response filter coefficients by its associated respective distinct portion of the plurality of discrete time signal samples. An adder () produces a resampled output sample that consists of a sum of elements of the product vector produced by the coefficient multiplier.