The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 24, 2012

Filed:

May. 11, 2010
Applicants:

Jae Won Nam, Daejeon, KR;

Young Deuk Jeon, Daejeon, KR;

Young Kyun Cho, Daejeon, KR;

Jong Kee Kwon, Daejeon, KR;

Inventors:

Jae Won Nam, Daejeon, KR;

Young Deuk Jeon, Daejeon, KR;

Young Kyun Cho, Daejeon, KR;

Jong Kee Kwon, Daejeon, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

Provided is a pipeline analog-to-digital converter (ADC) without a front-end sample-and-hold amplifier (SHA). To minimize a sampling error occurring between a flash ADC and a multiplying digital-to-analog converter (MDAC) of a first sub-ranging ADC due to removal of a front-end SHA, a delay time of a preamplifier included in the flash ADC is calculated, and the flash ADC samples an analog input signal later by the delay time than the MDAC. Accordingly, the pipeline ADC can minimize a sampling error without using a front-end SHA, and its chip area and power consumption can be reduced.


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