The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 24, 2012
Filed:
Aug. 22, 2007
David Wright, San Diego, CA (US);
Jason Muriby, San Diego, CA (US);
Erhan Hancioglu, San Diego, CA (US);
David Wright, San Diego, CA (US);
Jason Muriby, San Diego, CA (US);
Erhan Hancioglu, San Diego, CA (US);
Cypress Semiconductor Corporation, San Jose, CA (US);
Abstract
Embodiments of the invention relate to a method and apparatus to drive non-resistive loads. The non-resistive load driver may include two or more drivers, such as a high-drive circuit and a low-drive circuit, to drive rail-to-rail output voltages and to stabilize the output voltages at a substantially constant level. The high-drive circuit may drive the output voltage of the non-resistive load driver to a threshold level, whereas the low-drive circuit may modify the output voltage of the non-resistive load driver to approximate an input voltage of the non-resistive load driver, and compensate any leakage associated with the non-resistive loads to provide a substantially constant output voltage. The low-drive circuit consumes less current than the high-drive circuit. The non-resistive load driver consumes less power and use less chip space. Alternatively, the non-resistive load driver may be implemented using a single driver with multiple modes, such as a low-drive mode and a high-drive mode, by changing a bias current of the non-resistive load driver between a high current mode and a low current mode.