The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 24, 2012

Filed:

May. 04, 2010
Applicants:

Maurice O. Othieno, Alameda, CA (US);

Ramaswamy Ranganathan, Saratoga, CA (US);

Frederick E. Beville, San Jose, CA (US);

David A. Pruitt, San Jose, CA (US);

William D. Griffitts, Santa Clara, CA (US);

Inventors:

Maurice O. Othieno, Alameda, CA (US);

Ramaswamy Ranganathan, Saratoga, CA (US);

Frederick E. Beville, San Jose, CA (US);

David A. Pruitt, San Jose, CA (US);

William D. Griffitts, Santa Clara, CA (US);

Assignee:

Linear Technology Corporation, Milpitas, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/44 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor device is disclosed that has a die and a substrate having a die attachment area with a perimeter. A layer of solder connects the substrate and the die, the solder layer having at least one vent channel connected to the perimeter of the die attachment area, wherein the maximum distance from any point in the solder layer to the nearest free surface of the solder at a vent channel or at the perimeter of the die is less than the distance from the center of the die to the nearest edge of the die.


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