The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 17, 2012
Filed:
Dec. 13, 2005
Mihail Iotov, San Jose, CA (US);
Erhard Joachim Pistorius, Milpitas, CA (US);
Jim Park, San Jose, CA (US);
David Karchmer, Los Altos, CA (US);
Mihail Iotov, San Jose, CA (US);
Erhard Joachim Pistorius, Milpitas, CA (US);
Jim Park, San Jose, CA (US);
David Karchmer, Los Altos, CA (US);
Altera Corporation, San Jose, CA (US);
Abstract
Compiled configuration files for different programmable logic devices that are intended to be functionally equivalent may be compared using multiple different comparisons to assure functional equivalence. The different comparisons include a fitter or resource report comparison, an engineering bit settings report that compares vectors of bits that represent the settings of hard logic blocks, and comparisons based on location, connectivity and functionality. These comparisons are particularly well-suited for determining equivalence between different models of programmable logic devices, or even different types of devices such as field-programmable gate arrays as compared to mask-programmable logic devices.