The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 17, 2012

Filed:

Dec. 04, 2008
Applicants:

Michael Bruennert, München, DE;

Peter Gregorius, München, DE;

Georg Braun, Holzkirchen, DE;

Andreas Gärtner, München, DE;

Hermann Ruckerbauer, Moos, DE;

George William Alexander, Durham, NC (US);

Johannes Stecker, München, DE;

Inventors:

Michael Bruennert, München, DE;

Peter Gregorius, München, DE;

Georg Braun, Holzkirchen, DE;

Andreas Gärtner, München, DE;

Hermann Ruckerbauer, Moos, DE;

George William Alexander, Durham, NC (US);

Johannes Stecker, München, DE;

Assignee:

Qimonda AG, München, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

Distributed command and address bus architecture for memory modules and circuit boards is described. In one embodiment, a memory module includes a plurality of connector pins disposed on an edge of a circuit board, the plurality of connector pins comprising first pins coupled to a plurality of data bus lines, second pins coupled to a plurality of command and address bus lines, wherein the second pins are disposed in a first and a second region, wherein a portion of the first pins is disposed between the first and the second regions.


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