The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 17, 2012
Filed:
Sep. 26, 2007
Young-ha Lee, Daejeon, KR;
Youn-ok Park, Daejeon, KR;
Young-Ha Lee, Daejeon, KR;
Youn-Ok Park, Daejeon, KR;
Samsung Electronics Co., Ltd., Suwon-si, KR;
Electronics and Telecommunications Research Institute, Daejeon, KR;
Abstract
The present invention relates to a complex multiplier and a twiddle factor generator. The complex multiplier according to an embodiment of the invention includes: a first adder/subtracter that adds the real part of the complex number and a first twiddle factor or subtracts the first twiddle factor from the real part of the complex number according to a first signal; a second adder/subtracter that adds the imaginary part of the complex number and a second twiddle factor or subtracts the second twiddle factor from the imaginary part of the complex number according to a second signal; a first multiplier that multiplies the value obtained by the first adder/subtracter by a third twiddle factor and outputs the resulting value; a second multiplier that multiplies the value obtained by the second adder/subtracter by a fourth twiddle factor and outputs the resulting value; a multiplexer that selectively outputs the values output from the first and second multipliers as a real part output signal and an imaginary part output signal according to a third signal; and a controller that provides the first to third signals. According to the present invention, it is possible to achieve a complex multiplier having a simple hardware design.