The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 17, 2012
Filed:
Feb. 18, 2011
Dipankar Bhattacharya, Macungie, PA (US);
Ashish V. Shukla, Allentown, PA (US);
John Christopher Kriz, Palmerton, PA (US);
Makeshwar Kothandaraman, Bangalore, IN;
Dipankar Bhattacharya, Macungie, PA (US);
Ashish V. Shukla, Allentown, PA (US);
John Christopher Kriz, Palmerton, PA (US);
Makeshwar Kothandaraman, Bangalore, IN;
Other;
Abstract
A compensation circuit for controlling a variation in output impedance of at least one buffer circuit includes a monitor circuit having a pull-up portion comprising at least one PMOS transistor and a pull-down portion comprising at least one NMOS transistor. The monitor circuit is configured to track an operation of an output stage in the buffer circuit and is operative to generate a first control signal indicating a status of at least one characteristic of corresponding pull-up and pull-down portions in the output stage over variations in PVT conditions to which the buffer circuit may be subjected. The compensation circuit further includes a control circuit generating first and second sets of digital control bits for compensating the pull-up and pull-down portions in the output stage over prescribed variations in PVT conditions. The second set of digital control bits is generated based at least on the first set of digital control bits and the first control signal.