The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 17, 2012

Filed:

Sep. 17, 2009
Applicants:

Franz Schuler, Dresden, DE;

Georg Tempel, Dresden, DE;

Inventors:

Franz Schuler, Dresden, DE;

Georg Tempel, Dresden, DE;

Assignee:

Infineon Technologies AG, Neubiberg, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/423 (2006.01); H01L 29/788 (2006.01); H01L 21/8247 (2006.01);
U.S. Cl.
CPC ...
Abstract

The invention relates to a nonvolatile two-transistor semiconductor memory cell and an associated fabrication method, source and drain regions () for a selection transistor (AT) and a memory transistor (ST) being formed in a substrate (). The memory transistor (ST) has a first insulation layer (), a charge storage layer (), a second insulation layer () and a memory transistor control layer (), while the selection transistor (AT) has a first insulation layer (') and a selection transistor control layer (*). By using different materials for the charge storage layer () and the selection transistor control layer (), it is possible to significantly improve the charge retention properties of the memory cell by adapting the substrate doping with electrical properties remaining the same.


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