The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 10, 2012

Filed:

Jul. 01, 2010
Applicants:

Arifur Rahman, San Jose, CA (US);

Min-hsing Chen, Campbell, CA (US);

Inventors:

Arifur Rahman, San Jose, CA (US);

Min-Hsing Chen, Campbell, CA (US);

Assignee:

Xilinx, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method of designing an integrated circuit (IC) having multiple dies can include identifying a unified design library having a first process node specific (PNS) library for a first IC process technology and a second PNS library for a second IC process technology. The first PNS library can be correlated with a first die of the IC. The second PNS library can be correlated with the second die of the IC. Via a processor, a circuit element can be defined within a circuit design implemented within the IC according to the PNS library correlated to the die in which the circuit element is located.


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