The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 10, 2012
Filed:
Jul. 11, 2007
Engling Yeo, Milpitas, CA (US);
Eugene Pan, Milpitas, CA (US);
Henri Sutioso, San Jose, CA (US);
Jun Xu, Milpitas, CA (US);
Shaohua Yang, San Jose, CA (US);
Panu Chaichanavong, Mountain View, CA (US);
Gregory Burd, San Jose, CA (US);
Zining Wu, Los Altos, CA (US);
Engling Yeo, Milpitas, CA (US);
Eugene Pan, Milpitas, CA (US);
Henri Sutioso, San Jose, CA (US);
Jun Xu, Milpitas, CA (US);
Shaohua Yang, San Jose, CA (US);
Panu Chaichanavong, Mountain View, CA (US);
Gregory Burd, San Jose, CA (US);
Zining Wu, Los Altos, CA (US);
Marvell International Ltd., Hamilton, BM;
Abstract
A decoder memory system comprises a first memory comprising at least a portion of a parity check matrix H. A second memory receives the portion from the first memory and that is associated with a previous decoding iteration. A third memory communicates with the first memory, receives the parity check matrix H and is associated with a current decoding iteration. A fourth memory comprises likelihood ratios. A control module generates a LDPC decoded signal based on the parity check matrix H, the previous decoded iteration and the likelihood ratios.