The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 10, 2012
Filed:
May. 16, 2008
James Lyall Esliger, Richmond Hill, CA;
Denis Foley, Shrewsbury, MA (US);
James Lyall Esliger, Richmond Hill, CA;
Denis Foley, Shrewsbury, MA (US);
ATI Technologies ULC, Markham, Ontario, CA;
Abstract
An integrated circuit () may receive a boot loader code () via a debug access port (), wherein a boot logic is operative to block, upon a reset () of the programmable processor () from the debug access port (), commands and to the programmable processor from the debug access port, while still allowing the reset () command and while allowing write access to memory () to receive the boot loader code image () written to memory (). The boot logic also blocks commands to the memory subsystem () from the debug access port and turns off write access to memory () after allowing the boot loader code image () to be written. The boot logic validates the boot loader code image () by performing a security check and jumps to the boot loader code image () if it is valid, thereby allowing it to run on the programmable processor (). The boot logic may be logic circuits, software or a combination thereof.