The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 03, 2012

Filed:

Jun. 26, 2002
Applicants:

Stanley J. Kostoff, Ii, Ocala, FL (US);

Brian E. Markwalter, Ocala, FL (US);

William E. Earnshaw, Ocala, FL (US);

James Philip Patella, Hernando, FL (US);

Inventors:

Stanley J. Kostoff, II, Ocala, FL (US);

Brian E. Markwalter, Ocala, FL (US);

William E. Earnshaw, Ocala, FL (US);

James Philip Patella, Hernando, FL (US);

Assignee:

Qualcomm Atheros, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04J 3/14 (2006.01); H04L 12/26 (2006.01);
U.S. Cl.
CPC ...
Abstract

In a powerline network, a power line node device coupled to a host bridge application detects a 'jam packet' in response to an attempt to pass a frame to the host bridge application. The powerline node device uses internal logic to override a conventional ARQ response to this and subsequent frames, in particular, when such frames are of the type for which a response is expected, with an automatic FAIL response for a predetermined time interval.


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