The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 27, 2012
Filed:
Jul. 12, 2011
Sankaranarayanan Srinivasan, San Jose, CA (US);
Sridhar Krishnamurthy, San Jose, CA (US);
Brian D. Philofsky, Longmont, CO (US);
Kamal Chaudhary, Saratoga, CA (US);
Anirban Rahut, Santa Clara, CA (US);
Sankaranarayanan Srinivasan, San Jose, CA (US);
Sridhar Krishnamurthy, San Jose, CA (US);
Brian D. Philofsky, Longmont, CO (US);
Kamal Chaudhary, Saratoga, CA (US);
Anirban Rahut, Santa Clara, CA (US);
Xilinx, Inc., San Jose, CA (US);
Abstract
A computer-implemented method of implementing a circuit design within a programmable logic device can include selecting at least one circuit element of the circuit design. The selected circuit element can be converted to a latch. A timing analysis can be performed upon the circuit design after conversion of the selected circuit element to a latch. A determination can be made by a computer as to whether the timing of the circuit design improves and the conversion of the selected circuit element to a latch can be accepted when the timing of the circuit design improves. The circuit design can be output.