The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 27, 2012
Filed:
Feb. 20, 2008
Shankar Lakkapragada, San Jose, CA (US);
Scott Te-sheng Lien, Palo Alto, CA (US);
Tetse Jang, San Jose, CA (US);
Jesse H. Jenkins, Iv, Danville, CA (US);
Mark Men Bon NG, Milpitas, CA (US);
Shankar Lakkapragada, San Jose, CA (US);
Scott Te-Sheng Lien, Palo Alto, CA (US);
Tetse Jang, San Jose, CA (US);
Jesse H. Jenkins, IV, Danville, CA (US);
Mark Men Bon Ng, Milpitas, CA (US);
Xilinx, Inc., San Jose, CA (US);
Abstract
A method of minimizing power consumption in an integrated device is disclosed. The method comprises providing a plurality of circuit blocks having circuits for performing logic functions, wherein each circuit block consumes power in a static state; coupling one of a plurality of operating voltages to each circuit block of the plurality of circuit blocks; enabling a reduction of power consumed by a first set of circuit blocks by way of a first power reduction signal; and enabling a reduction of power consumed by a second set of circuit blocks by way of a second power reduction signal. A circuit for minimizing power consumption in a device is also disclosed.