The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 27, 2012
Filed:
Oct. 31, 2006
Alexandre M. Bratkovski, Mountain View, CA (US);
Wei Wu, Palo Alto, CA (US);
Gregory S. Snider, Mountain View, CA (US);
R. Stanley Williams, Portola Valley, CA (US);
Alexandre M. Bratkovski, Mountain View, CA (US);
Wei Wu, Palo Alto, CA (US);
Gregory S. Snider, Mountain View, CA (US);
R. Stanley Williams, Portola Valley, CA (US);
Hewlett-Packard Development Company, L.P., Houston, TX (US);
Abstract
Various method and system embodiments of the present invention are directed to implementing serial logic gates using nanowire-crossbar arrays with spintronic devices located at nanowire-crossbar junctions. In one embodiment of the present invention, a nanowire-crossbar array comprises a first nanowire and a number of substantially parallel control nanowires positioned so that each control nanowire overlaps the first nanowire. The nanowire-crossbar array includes a number of spintronic devices. Each spintronic device is configured to connect one of the control nanowires to the first nanowire and operate as a latch for controlling signal transmissions between the control nanowire and the first nanowire.