The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 27, 2012
Filed:
Jan. 12, 2010
Huang-chung Cheng, Hsinchu, TW;
Ta-chuan Liao, Taichung, TW;
Sheng-kai Chen, Taipei County, TW;
Ying-hui Chen, Taoyuan County, TW;
Chi-neng MO, Taoyuan County, TW;
Huang-Chung Cheng, Hsinchu, TW;
Ta-Chuan Liao, Taichung, TW;
Sheng-Kai Chen, Taipei County, TW;
Ying-Hui Chen, Taoyuan County, TW;
Chi-Neng Mo, Taoyuan County, TW;
Chunghwa Picture Tubes, Ltd., Taoyuan, TW;
Abstract
A thin film transistor and a manufacturing method thereof are provided. An insulating pattern layer having at least one protrusion is formed on a substrate. Afterwards, at least one spacer and a plurality of amorphous semiconductor patterns separated from each other are formed on the insulating pattern layer. The spacer is formed at one side of the protrusion and connected between the amorphous semiconductor patterns. Later, the spacer and the amorphous semiconductor patterns are crystallized. Subsequently, the protrusion and the insulating pattern layer below the spacer are removed so that a beam structure having a plurality of corners is formed and suspended over the substrate. Then, a carrier tunneling layer, a carrier trapping layer and a carrier blocking layer are sequentially formed to compliantly wrap the corners of the beam structure. Hereafter, a gate is formed on the substrate to cover the beam structure and wrap the carrier blocking layer.