The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 27, 2012

Filed:

Jan. 17, 2011
Applicant:

Hoon Jeong, Hwaeseong-si, KR;

Inventor:

Hoon Jeong, Hwaeseong-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/425 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method of fabricating a semiconductor device includes forming a well impurity region, a lower impurity region and an upper impurity region in a semiconductor substrate. The lower impurity region has a different conductivity type than a conductivity type of the well impurity region, the upper impurity region has a different conductivity type than the conductivity type of the lower impurity region, and the upper impurity region has a same conductivity type as the conductivity type of the well impurity region and has a higher impurity concentration than an impurity concentration of the well impurity region. The semiconductor substrate is etched to form lower semiconductor patterns, upper semiconductor patterns upwardly projecting from predetermined regions of the lower semiconductor patterns. An isolation layer filling the first and second spaces between the lower semiconductor patterns and between the upper semiconductor patterns, respectively is formed.


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