The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 27, 2012

Filed:

Dec. 28, 2007
Applicants:

Siew S. Hiew, San Jose, CA (US);

Nan Nan, San Jose, CA (US);

Paul Hsueh, Concord, CA (US);

Abraham C. MA, Fremont, CA (US);

Ming-shiang Shen, Taipei Hsien, TW;

Inventors:

Siew S. Hiew, San Jose, CA (US);

Nan Nan, San Jose, CA (US);

Paul Hsueh, Concord, CA (US);

Abraham C. Ma, Fremont, CA (US);

Ming-Shiang Shen, Taipei Hsien, TW;

Assignee:

Super Talent Electronics, Inc., San Jose, CA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H05K 3/30 (2006.01); H05K 3/00 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method for fabricating MicroSD devices includes forming a PCB panel having multiple PCBs arranged in parallel rows, with each PCB connected to its neighboring PCBs in each row by relatively narrow connecting bridge pieces, and separated from PCBs of adjacent rows by elongated stamped out blank slots. Passive components are attached by conventional surface mount technology (SMT) techniques. IC chips, including a MicroSD controller chip and a flash memory chip, are attached to the PCB by wire bonding or other chip-on-board (COB) technique. A molded housing is then formed over the IC chips and passive components using a mold that prevents formation of plastic on the upper surface of each PCB. The connecting bridge pieces are then cut using using a rotary saw. A front edge chamfer process is then performed.


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