The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 20, 2012
Filed:
Jun. 30, 2009
Wayne H. Woods, Essex Junction, VT (US);
Cole E. Zemke, Essex Junction, VT (US);
Wayne H. Woods, Essex Junction, VT (US);
Cole E. Zemke, Essex Junction, VT (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A method of linking on-chip parasitic coupling capacitance into distributed pre-layout passive models such as distributed transmission line models and on-chip spiral inductor models includes recognizing a passive device such as a distributed transmission line device and an on-chip spiral inductor device, interpreting data obtained from the recognizing the passive device, breaking the passive device into a plurality of sections, the plurality of sections including a terminal of a model call, extracting parameters of the passive device by Layout Versus Schematic (LVS) and parasitic extraction, connecting the terminal to a pre-layout passive network by selectively low and high resistive paths set by the parameters of the passive device depending on whether crossing lines are present or not present in one of the plurality of sections, connecting the terminal to a distributed passive model, and coupling the crossing lines to the terminal via capacitors produced in an extracted netlist with the passive device having distributed coupling to a plurality of crossing lines.