The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 20, 2012

Filed:

Jul. 13, 2007
Applicant:

Anthony James Magrath, Edinburgh, GB;

Inventor:

Anthony James Magrath, Edinburgh, GB;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03F 99/00 (2009.01);
U.S. Cl.
CPC ...
Abstract

An amplifier circuit () has an input stage (OP) and an output stage (Q, Q) operating with different supply voltages and different quiescent voltages. The output stage has a feedback input connected to receive a feedback signal from the output of the output stage. A biasing circuit () applies a bias signal (Ioff) to said input stage at an operating level appropriate to establish a quiescent output voltage different from a ground reference level of the input stage. To start up the amplifier with minimal transients at the output, the following steps are performed in sequence: (a) with the output stage disabled, pre-charging the amplifier output over a period of time to a level (Vmid) corresponding to the ground reference level of the input stage; (b) with the biasing circuit effectively disabled and a zero input signal at said signal input, enabling the input and output stages; (c) activating said biasing circuit progressively so as to ramp said bias signal (Ioff) to said operating level over a further period of time, thereby driving the output progressively to said quiescent output voltage. A separate improvement is in the biasing circuit, which uses the actual output stage supply voltage (PVdd) as a reference to define the operating level of said bias signal (Ioff).


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