The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 20, 2012

Filed:

Apr. 26, 2007
Applicants:

Dipak R. Patel, Hatboro, PA (US);

Christopher J. Cotignola, Doylestown, PA (US);

Thomas C. Gross, Honey Brook, PA (US);

Inventors:

Dipak R. Patel, Hatboro, PA (US);

Christopher J. Cotignola, Doylestown, PA (US);

Thomas C. Gross, Honey Brook, PA (US);

Assignee:

General Instrument Corporation, Horsham, PA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04M 1/24 (2006.01); H04M 3/08 (2006.01); H04M 3/22 (2006.01); H04M 1/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A first clock signal is generated by a first circuit and a second clock signal is generated by an auxiliary clock circuit. A switch controls whether the first clock signal or the second clock signal is provided to a subscriber line integrated circuit (SLIC). The SLIC is operable to generate a line voltage within predetermined tolerances on a loop line at a customer premises if the SLIC is receiving the first clock signal or the second clock signal. A resync signal is sent to the SLIC to cause it to resync with the first clock signal without going through a reset operation.


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