The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 20, 2012
Filed:
Jun. 26, 2009
Troy J. Beukema, Yorktown Heights, NY (US);
Steven M. Clements, Research Triangle Park, NC (US);
Chun-ming Hsu, Hopewell Junction, NY (US);
William R. Kelly, Hopewell Junction, NY (US);
Elizabeth M. May, Research Triangle Park, NC (US);
Sergey V. Rylov, Yorktown Heights, NY (US);
Troy J. Beukema, Yorktown Heights, NY (US);
Steven M. Clements, Research Triangle Park, NC (US);
Chun-Ming Hsu, Hopewell Junction, NY (US);
William R. Kelly, Hopewell Junction, NY (US);
Elizabeth M. May, Research Triangle Park, NC (US);
Sergey V. Rylov, Yorktown Heights, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A system and method for closed loop clock correction includes adjusting two or more input signals comprising at least one in-phase clock and one quadrature clock, and applying adjusted quadrature clock signals to a device capable of generating a 4-quadrant interpolated output clock phase. An interpolated output clock phase is delayed to form a clock for a measurement device. Two or more adjusted input signals are measured on a measurement device over a range of interpolated output clock phases. Errors are determined on the in-phase clock and the quadrature clock using sampled information from the measurement device. The in-phase clock and the quadrature clock are adapted using determined error information.