The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 20, 2012
Filed:
Dec. 29, 2010
Kwan-dong Kim, Gyeonggi-do, KR;
Kwan-Dong Kim, Gyeonggi-do, KR;
Hynix Semiconductor, Gyeonggi-do, KR;
Abstract
An integrated circuit includes a CML swing reference voltage generating unit, a CML bias control voltage generating unit and a CML buffering unit. The CML swing reference voltage generating unit determines a level of a CML swing reference voltage in response to a frequency setting code and a CML bias control voltage. The CML bias control voltage generating unit compares the level of the CML swing reference voltage with a level of a CML target reference voltage and determines a level of the CML bias control voltage based on the comparison result. The CML buffering unit generates a CML output signal swinging in a CML region by buffering an input signal and determines a swing level of the CML output signal on the basis of the level of the CML swing reference voltage in response to the frequency setting code and the CML bias control voltage.