The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 20, 2012
Filed:
Jul. 31, 2009
David Lewis, Toronto, CA;
Vaughn Betz, Toronto, CA;
Irfan Rahim, San Jose, CA (US);
Peter Mcelheny, Morgan Hill, CA (US);
Yow-juang W. Liu, San Jose, CA (US);
Bruce Pedersen, Sunnyvale, CA (US);
David Lewis, Toronto, CA;
Vaughn Betz, Toronto, CA;
Irfan Rahim, San Jose, CA (US);
Peter McElheny, Morgan Hill, CA (US);
Yow-Juang W. Liu, San Jose, CA (US);
Bruce Pedersen, Sunnyvale, CA (US);
Altera Corporation, San Jose, CA (US);
Abstract
A programmable logic device (PLD) includes a delay circuit and a body-bias generator. The delay circuit has a delay configured to represent a delay of user circuit implement in the PLD. The body-bias generator is configured to adjust the body bias of a transistor within the user circuit. The body-bias generator adjusts the body bias of the transistor in response to a level derived from the signal propagation delay of the delay circuit.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile