The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 8138557 B1

PDF
Full Text
Expired
Date of Patent:
Mar. 20, 2012

Filed:

Nov. 11, 2009
Applicants:

Kuo-wei Peng, Taipei County, TW;

Zhong-wei Liu, Wuxi, CN;

Qian-hua Zhou, Wuxi, CN;

Inventors:

Kuo-Wei Peng, Taipei County, TW;

Zhong-Wei Liu, Wuxi, CN;

Qian-Hua Zhou, Wuxi, CN;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/41 (2006.01);
U.S. Cl.
CPC ...
Abstract

A layout structure of a MOSFET is provided. The layout structure of the MOSFET includes a plurality of MOSFET cells, a first source/drain metal bus structure and a second source/drain metal bus structure. The first source/drain metal bus structure is electrically connected to first sources/drains of the MOSFET cells, and a width thereof is gradually decreased in a predetermined direction. The second source/drain metal bus structure is electrically connected to second sources/drains of the MOSFET cells, and a width thereof is gradually increased in the predetermined direction.


Find Patent Forward Citations

Peng, Kuo-Wei. (2012). Layout structure of mosfet and layout method thereof (U.S. Patent No. 8138557). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8138557

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