The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 20, 2012
Filed:
Feb. 05, 2007
Didier Pribat, Sevres, FR;
Costel-sorin Cojocaru, Palaiseau, FR;
Didier Pribat, Sevres, FR;
Costel-Sorin Cojocaru, Palaiseau, FR;
Ecole Polytechnique, , FR;
Abstract
The invention relates to a process for fabricating a vertical transistor structure. On a substrate (), is a first conductive layer (), providing the source or drain electrode function, and an upper conductive layer (), providing the drain or source electrode function. The production of a membrane includes a stack of porous layers including a first insulating layer (), a second conductive layer (), providing the gate electrode function, and an upper insulating layer (') on the surface of the substrate covered with the first conductive layer () providing the drain or source electrode function. The porous layers having substantially stacked pores. The production of filaments made of a semiconductor material is inside some of the stacked pores of the porous layers. The production of the upper conductive layer provides the source or drain electrode function on the surface of the stack of porous layers filled with filaments made of semiconductor material.