The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 13, 2012

Filed:

Nov. 17, 2008
Applicants:

William E. Hall, Clinton, CT (US);

Guerney D. H. Hunt, Yorktown Heights, NY (US);

Paul A. Karger, Chappaqua, NY (US);

Mark F. Mergen, Mount Kisco, NY (US);

David R. Safford, Brewster, NY (US);

David C. Toll, Wappingers Falls, NY (US);

Inventors:

William E. Hall, Clinton, CT (US);

Guerney D. H. Hunt, Yorktown Heights, NY (US);

Paul A. Karger, Chappaqua, NY (US);

Mark F. Mergen, Mount Kisco, NY (US);

David R. Safford, Brewster, NY (US);

David C. Toll, Wappingers Falls, NY (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G06F 13/00 (2006.01); G06F 13/28 (2006.01); G06F 9/46 (2006.01); G06F 9/26 (2006.01); G06F 9/34 (2006.01);
U.S. Cl.
CPC ...
Abstract

A mechanism is provided, in a data processing system, for accessing memory based on an effective address submitted by a process of a partition. The mechanism may translate the effective address into a virtual address using a segment look-aside buffer. The mechanism may further translate the virtual address into a partition real address using a page table. Moreover, the mechanism may translate the partition real address into a system real address using a logical partition real memory map for the partition. The system real address may then be used to access the memory.


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