The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 13, 2012

Filed:

Jul. 30, 2007
Applicants:

Jerzy Wielgus, Mt. Prospect, IL (US);

Daniel R. Gamota, Palatine, IL (US);

Tomasz L. Klosowiak, Glenview, IL (US);

John B. Szczech, Schaumburg, IL (US);

Kin P. Tsui, Morton Grove, IL (US);

Inventors:

Jerzy Wielgus, Mt. Prospect, IL (US);

Daniel R. Gamota, Palatine, IL (US);

Tomasz L. Klosowiak, Glenview, IL (US);

John B. Szczech, Schaumburg, IL (US);

Kin P. Tsui, Morton Grove, IL (US);

Assignee:

Motorola Solutions, Inc., Schaumburg, IL (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/34 (2006.01); H05K 7/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method and apparatus for forming controlled stress fractures in metal produces electrically isolated, closely spaced circuit sub-entities for use on a metallized printed wiring board. A polymeric substrate has a layer of metal adhered to the surface, and the metal layer is formed into entities. Each entity has a fracture initiating feature formed into it, which serves to initiate and/or direct a stress crack that is induced in the metal. The entities are fractured in a controlled manner by subjecting the substrate and the entities to mechanical stress by a rapid thermal excursion, creating a stress fracture in the entity extending from the fracture initiating feature. The stress fracture divides each entity into two or more sub-entities that are electrically isolated from each other by the stress fracture. The resulting structure can be used to form circuitry requiring very fine spaces for high density printed circuit boards. The rapid thermal stress may be induced by a high intensity, strobed xenon arc lamp.


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