The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 13, 2012
Filed:
Dec. 17, 2009
Atsushi Yagishita, Voorheesville, NY (US);
Makoto Fujiwara, Slingerlands, NY (US);
Hirohisa Kawasaki, Ballston Spa, NY (US);
Mariko Takayanagi, Clifton Park, NY (US);
Atsushi Yagishita, Voorheesville, NY (US);
Makoto Fujiwara, Slingerlands, NY (US);
Hirohisa Kawasaki, Ballston Spa, NY (US);
Mariko Takayanagi, Clifton Park, NY (US);
Kabushiki Kaisha Toshiba, Tokyo, JP;
Abstract
Multi-gate metal oxide silicon transistors and methods of making multi-gate metal oxide silicon transistors are provided. The multi-gate metal oxide silicon transistor contains a bulk silicon substrate containing one or more convex portions between shallow trench regions; one or more dielectric portions over the convex portions; one or more silicon fins over the dielectric portions; a shallow trench isolation layer in the shallow trench isolation regions; and a gate electrode. The upper surface of the shallow trench isolation layer can be located below the upper surface of the convex portion, or the upper surface of the shallow trench isolation layer can be located between the lower surface and the upper surface of first dielectric layer. The multi-gate metal oxide silicon transistor can contain second spacers adjacent to side surfaces of the convex portions in a source/drain region.