The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 06, 2012
Filed:
Sep. 25, 2008
Ning-yi Xu, Beijing, CN;
Xiong-fei Cai, Beijing, CN;
Rui Gao, Beijing, CN;
Jing Yan, Beijing, CN;
Feng-hsiung Hsu, Cupertino, CA (US);
Ning-Yi Xu, Beijing, CN;
Xiong-Fei Cai, Beijing, CN;
Rui Gao, Beijing, CN;
Jing Yan, Beijing, CN;
Feng-Hsiung Hsu, Cupertino, CA (US);
Microsoft Corporation, Redmond, WA (US);
Abstract
Accelerator systems and methods are disclosed that utilize FPGA technology to achieve better parallelism and processing speed. A Field Programmable Gate Array (FPGA) is configured to have a hardware logic performing computations associated with a neural network training algorithm, especially a Web relevance ranking algorithm such as LambaRank. The training data is first processed and organized by a host computing device, and then streamed to the FPGA for direct access by the FPGA to perform high-bandwidth computation with increased training speed. Thus, large data sets such as that related to Web relevance ranking can be processed. The FPGA may include a processing element performing computations of a hidden layer of the neural network training algorithm. Parallel computing may be realized using a single instruction multiple data streams (SIMD) architecture with multiple arithmetic logic units in the FPGA.