The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 06, 2012
Filed:
Dec. 17, 2009
Applicants:
Siddharth Gupta, Greater Noida, IN;
Nitin Jain, Greater Noida, IN;
Anand Mishra, Greater Noida, IN;
Inventors:
Assignee:
STMicroelectronics Pvt. Ltd., Greater Nodia (UP), IN;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 7/00 (2006.01);
U.S. Cl.
CPC ...
Abstract
A memory architecture includes a plurality of local input and output circuitries, with each local input and output circuitry associated with at least one memory bank. The memory architecture also includes a global input and output circuitry, which includes a plurality of global sub-write circuitries, is coupled to the plurality of local input and output circuitries One global sub-write circuitry is enabled and provides a write-data to a selected local input and output circuitry.