The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 28, 2012

Filed:

Oct. 10, 2006
Applicants:

Hiroaki Nomizo, Nagano, JP;

Atsushi Ishikawa, Fujimi, JP;

Tsuyoshi Tamura, Hara-mura, JP;

Inventors:

Hiroaki Nomizo, Nagano, JP;

Atsushi Ishikawa, Fujimi, JP;

Tsuyoshi Tamura, Hara-mura, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K 17/687 (2006.01);
U.S. Cl.
CPC ...
Abstract

An integrated circuit device includes an I/O circuit which buffers and outputs an input signal D from a pad when an enable signal ENB is set at a second voltage level, a circuit block to which an output signal from the I/O circuit is input, and a malfunction prevention circuit which outputs to the circuit block an output signal QP of which a voltage level is set by a first power supply VDDC in a period Tin which the signal ENB is set at a first voltage level and a period Tincluding a period in which the signal ENB changes from the first voltage level to the second voltage level, and outputs to the circuit block the output signal QP corresponding to an output signal QI from the I/O circuit in a period Tin which the signal ENB is set at the second voltage level.


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