The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 21, 2012
Filed:
Oct. 25, 2007
Kaoru Noumi, Kobe, JP;
Susumu Nishihashi, Kobe, JP;
Tomoyuki Katou, Kobe, JP;
Yukio Ishikawa, Kobe, JP;
Yasuyuki Umezaki, Kawasaki, JP;
Hidetaka Ebeshu, Kawasaki, JP;
Shigeo Koide, Kawasaki, JP;
Yukio Fujisawa, Tokyo, JP;
Hiroaki Shimauchi, Tokyo, JP;
Kaoru Noumi, Kobe, JP;
Susumu Nishihashi, Kobe, JP;
Tomoyuki Katou, Kobe, JP;
Yukio Ishikawa, Kobe, JP;
Yasuyuki Umezaki, Kawasaki, JP;
Hidetaka Ebeshu, Kawasaki, JP;
Shigeo Koide, Kawasaki, JP;
Yukio Fujisawa, Tokyo, JP;
Hiroaki Shimauchi, Tokyo, JP;
Fujitsu Ten Limited, Kobe-shi, JP;
Fujitsu Semiconductor Limited, Yokohama-shi, JP;
Renesas Electronics Corporation, Kawasaki-shi, JP;
Abstract
An error detector has a parity bit generator which generates error detection data for data strings sent from a CPU I/F to a memory, a parity checker which detects an error in the data strings output from the memory based on the error detection data, and a selector circuit which switchingly outputs the data from the parity bit generator and the data from a CPU which sends diagnostic data. While the selector circuit is switched to output the data from the CPU, based on the error detection data output from the selector circuit, the error detector conducts a failure diagnosis of error detection functions including at least one of the parity bit generator and the parity checker.