The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 21, 2012
Filed:
Sep. 01, 2006
Junya Sato, Tokyo, JP;
Shinji Watanabe, Tokyo, JP;
Nobuhiro Mikami, Tokyo, JP;
Atsumasa Sawada, Tokyo, JP;
Junya Sato, Tokyo, JP;
Shinji Watanabe, Tokyo, JP;
Nobuhiro Mikami, Tokyo, JP;
Atsumasa Sawada, Tokyo, JP;
NEC Corporation, Tokyo, JP;
Abstract
An object of the present invention is to prevent occurrence of an electrical fault such as signal disconnection due to exfoliation between a via and a printed circuit board, via crack, or the like, caused by various stresses that may arise when the printed circuit board is curved. The printed circuit board includes a first wiring layer, an electrical insulating base materialformed on the first wiring layerand including a via base holethat leads to the first wiring layer, and a second wiring layerthat is formed on the electrical insulating base materialand is electrically connected to the first wiring layerthrough the via base hole. In a region of the second wiring layerdisposed at least in the vicinity of the via base hole, a stress relieving portionis formed which relieves bending stress, tensile stress, compressive stress, and shear stress that may arise when the electrical insulating base materialis curved.