The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 07, 2012

Filed:

Apr. 23, 2009
Applicants:

Nakaba Sato, Odawara, JP;

Kazusige Nagamatsu, Odawara, JP;

Toshiaki Terao, Odawara, JP;

Hiroji Shibuya, Odawara, JP;

Inventors:

Nakaba Sato, Odawara, JP;

Kazusige Nagamatsu, Odawara, JP;

Toshiaki Terao, Odawara, JP;

Hiroji Shibuya, Odawara, JP;

Assignee:

Hitachi, Ltd., Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/06 (2006.01);
U.S. Cl.
CPC ...
Abstract

Even if each processor core uses the same logical address, a processing-target program corresponding to each processor core can be selected. A logical address of multiple address mapping tables is set to a same logical address in correspondence with an embedded OS program or a RAID management program, and a physical address is set to a different physical address in correspondence with the actual storage destination of an embedded OS program or a RAID management program. Each processor core, on start-up, uses a self address mapping table to execute address mapping processing with each processor core based on the same logical address, selects an embedded OS program or a RAID management program according to the physical address obtained in the address mapping processing, and executes processing according to the selected program.


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