The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 07, 2012

Filed:

Jan. 28, 2010
Applicants:

Matthew D. Pickett, San Francisco, CA (US);

John Paul Strachan, Millbrae, CA (US);

Muhammad Shakeel Qureshi, Santa Clara, CA (US);

Inventors:

Matthew D. Pickett, San Francisco, CA (US);

John Paul Strachan, Millbrae, CA (US);

Muhammad Shakeel Qureshi, Santa Clara, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02H 9/08 (2006.01); H02H 3/08 (2006.01); H02H 9/02 (2006.01); H02H 9/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A memristor-protection integrated circuit. The memristor-protection integrated circuit includes a first current-bias circuit, a second current-bias circuit, an inverter, and a current limiter. The first and second current-bias circuits are configured to be coupled to first and second power-supply rails, respectively. The inverter is coupled to the first current-bias circuit and to the second current-bias circuit, and is configured to couple at least one memristor to at least one of the first current-bias circuit and the second current-bias circuit in response to an input signal applied to the inverter. The current limiter is coupled to the first current-bias circuit and coupled to the second current-bias circuit, and is configured to limit current flowing through the memristor.


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