The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 07, 2012
Filed:
Feb. 08, 2011
Shinichi Domae, Osaka, JP;
Hiroshi Masuda, Osaka, JP;
Yoshiaki Kato, Hyogo, JP;
Kousaku Yano, Osaka, JP;
Shinichi Domae, Osaka, JP;
Hiroshi Masuda, Osaka, JP;
Yoshiaki Kato, Hyogo, JP;
Kousaku Yano, Osaka, JP;
Panasonic Corporation, Osaka, JP;
Abstract
A multilayer wiring structure of a semiconductor device having a stacked structure is arranged to restrain reliability degradation due to stress applied to the region of wiring between opposite upper and lower plugs. The rate of overlap of contact surface between upper plug and wiring on contact surface between lower plug and wiring, is small to the extent that no void is generated. The multilayer wiring structure is produced such that no grain boundary is contained in the region of wiring between upper and lower plugs. The difference in thermal expansion coefficient between the material of wiring and the material of upper and lower plugs, is small to the extent that no void is generated.