The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 07, 2012
Filed:
Aug. 27, 2009
John V. Veliadis, Hanover, MD (US);
Eric Jonathan Stewart, Silver Spring, MD (US);
Megan Jean Mccoy, Columbia, MD (US);
Li-shu Chen, Ellicott City, MD (US);
Ty Richard Mcnutt, Columbia, MD (US);
John V. Veliadis, Hanover, MD (US);
Eric Jonathan Stewart, Silver Spring, MD (US);
Megan Jean McCoy, Columbia, MD (US);
Li-shu Chen, Ellicott City, MD (US);
Ty Richard McNutt, Columbia, MD (US);
Northrop Grumman Systems Corporation, Baltimore, MD (US);
Abstract
Systems and methods for maximizing the breakdown voltage of a semiconductor device are described. In a multiple floating guard ring design, the spacing between two consecutive sets of floating guard rings may increase with their distance from the main junction while maintaining depletion region overlap, thereby alleviating crowding and optimally spreading the electric field leading to a breakdown voltage that is close to the intrinsic material limit. In another exemplary embodiment, fabrication of floating guard rings simultaneously with the formation of another semiconductor feature allows precise positioning of the first floating guard ring with respect to the edge of a main junction, as well as precise control of floating guard ring widths and spacings. In yet another exemplary embodiment, design of the vertical separation between doped regions of a semiconductor device adjusts the device's gate-to-source breakdown voltage without affecting the device's pinch-off voltage.