The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 07, 2012

Filed:

Feb. 19, 2009
Applicants:

Jun Sin Yi, Seocho-gu, KR;

Byoung Deog Choi, Yongin-si, KR;

Sung Wook Jung, Suwon-si, KR;

Kyung Soo Jang, Seoul, KR;

Jae Hyun Cho, Gyeongsan-si, KR;

Inventors:

Jun sin Yi, Seocho-gu, KR;

Byoung deog Choi, Yongin-si, KR;

Sung wook Jung, Suwon-si, KR;

Kyung soo Jang, Seoul, KR;

Jae hyun Cho, Gyeongsan-si, KR;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/36 (2006.01); H01L 29/76 (2006.01);
U.S. Cl.
CPC ...
Abstract

Provided are nanocrystal silicon layer structures formed using a plasma deposition technique, methods of forming the same, nonvolatile memory devices including the nanocrystal silicon layer structures, and methods of fabricating the nonvolatile memory devices. A method of forming a nanocrystal silicon layer structure includes forming a buffer layer on a substrate and forming a nanocrystal silicon layer on the buffer layer by a plasma deposition technique using silicon (Si)-containing gas and hydrogen (H)-containing gas. In this method, the nanocrystal silicon layer can be directly deposited on a glass substrate using plasma vapor deposition without performing a post-processing process so that the fabrication of a nonvolatile memory device can be simplified, thereby reducing fabrication cost.


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